To diffuse the impurities with the N-type epitaxial region, the silicon dioxide layer has to be etched in selected areas. A detailed image showing the P-type, N-type epitaxial layer and SiO2 layer is given below. This layer is only 1 micrometer thin and is grown by exposing the epitaxial layer to oxygen atmosphere at 1000C. The layer is then cooled down, polished and cleaned.Īs explained above, this layer is required contamination of the N-layer epitaxy. All the components required for the circuit are built on top of this layer. This forms the epitaxial layer on the substrate. After heating, a gas mixture f Silicon atoms and pentavalent atoms are also passed over the layer. This is done by placing the n-type layer on top of the P-type and heating then inside a diffusion furnace at very high temperature (nearly 1200C). The epitaxial groth process of a low resistive N-type over a high resistive P-type is to be carried out. After cutting hundreds of them each wafer is polished and cleaned to form a P-type substrate layer. These wafers may be circular or rectangular in shape with respect to the shape of the IC. Each wafer will precisely have a thickness of 200 micrometer and a diameter of 25 mm. The silicon is then cut into thin slices with high precision using a diamond saw. A silicon crystal of P-type is grown in dimensions of 250mm length and 25mm diameter. The different processes carried out for achieving this are explained below.īeing the base layer of the IC, the P-type is silicon is first built for the IC. Monolithic IC Manufacturing Processįor the manufacture and production of the monolithic IC, all circuit components and their interconnections are to be formed in a single thin wafer. This metallic layer is used to provide interconnections between the different components used in the IC. The up-most layer is that made of aluminium. This layer also protects the silicon layer from contamination. The rest of the wafer remains protected against diffusion. This layer is etched away from the region where diffusion is desired to be permitted with photolithographic process. Since there is a selective P-type and N-type impurity diffusion going on in the second layer, this layer acts as a barrier in the process. The layer above N-type is made of silicon dioxide (SiO2) material. The N-type layer becomes the collector for the transistor or an element for a diode or a capacitor.
TRANSISTOR SATURATION SERIES
The N-type silicon material is grown as a single crystal extension of the P-layer and the components are required are fabricated using series of P-type and N-type impurity diffusions. This layer has a typical thickness of 25 micrometer. All the active and passive components required for the circuit are fabricated onto this layer.
The layer above the substrate P-type silicon layer is the N-type layer.
Silicon is the preferred semiconductor for the P-type and N-type layer because of its favourable characteristics for the manufacturing of an IC. This layer will have a typical thickness of 200 micrometer. The base layer will be a P-type silicon layer and is named as the substrate layer. The basic structure of a monolithic IC will have 4 layers of different materials. These results demonstrate the feasibility of two-dimensional graphene devices for analogue and radio-frequency circuit applications without the need for bandgap engineering.With the basic circuit, the different layers for the monolithic IC are then considered. The electrostatic modulation of the channel through an efficiently coupled top gate yields transconductances as high as 150 microS microm-1 despite low on-off current ratios. Unusual features in the current-voltage characteristic are explained by a field-effect model and diffusive carrier transport in the presence of a singular point in the density of states. The saturation velocity depends on the charge-carrier concentration and we attribute this to scattering by interfacial phonons in the SiO2 layer supporting the graphene channels. Here we report the first observation of saturating transistor characteristics in a graphene field-effect transistor. The novel electronic properties of graphene, including a linear energy dispersion relation and purely two-dimensional structure, have led to intense research into possible applications of this material in nanoscale devices.
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